1. Field of the Invention
The present invention is related to the manufacture of insulated gate field effect transistors, and more particularly to the structure and doping of gate electrodes therein.
2. Description of the Related Art
An insulated-gate field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate electrode to control an underlying surface channel joining a source and a drain. The channel, drain and source are located in a semiconductor substrate, with the channel being doped oppositely to the drain and source. The gate electrode is separated from the semiconductor substrate by a thin insulating layer (i.e., a gate dielectric layer) such as an oxide. The operation of the IGFET involves application of an input voltage to the gate electrode, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
In typical IGFET processing, the source and drain are formed by introducing dopants of a second conductivity type (P or N) into the semiconductor substrate of a first conductivity type (N or P) using a patterned gate electrode as a mask. This self-aligning procedure tends to improve packing density and reduce parasitic overlap capacitances between the gate electrode and the source/drain regions. Polysilicon (also called polycrystalline silicon, poly-Si, or just "poly") thin films are typically used as the gate electrode. Since polysilicon has the same high melting point as a silicon substrate, it can be deposited prior to source and drain formation. The polysilicon is anisotropically etched through openings in a photoresist mask to provide a gate electrode which forms a mask during formation of the source and drain by ion implantation. Photolithography is used to create patterns in the photoresist mask that define the gate electrode.
The gate electrode is typically doped by the same ion implantation as are the source and drain. For example, boron is frequently implanted to form the source and drain in a P-channel IGFET, and the boron is also implanted into the gate electrode of the IGFET to create a P-type polysilicon gate electrode. However, because boron is such a "light" atom (i.e., low atomic mass), boron implanted into the polysilicon gate electrode can easily diffuse downward along the grain boundaries of the polysilicon and into the gate oxide, and may diffuse ultimately into the underlying channel region. The presence of such boron in the channel affects the device parameters of the IGFET, especially the threshold voltage, and the presence of boron in the gate oxide can affect the reliability of the IGFET. Both effects are tremendously undesirable.
A number of techniques have been utilized to reduce diffusion of dopants, especially boron, into the gate dielectric and into the underlying channel. One such method is disclosed by Fang, et al, in a paper entitled "Low-Temperature Furnace-Grown Reoxidized Nitrided Oxide Gate Dielectrics as a Barrier to Boron Penetration," IEEE Electron Device Letters, Vol. 13, No. 4, April, 1992, which includes a nitridation of a partially grown gate oxide, followed by an additional oxidation step. Polysilicon is then deposited on the reoxidized nitrided oxide and etched to form gate electrodes.
Other similar methods are disclosed by Joshi, et al in a paper entitled "Oxynitride Gate Dielectrics for P+-polysilicon Gate MOS Devices," IEEE Electron Device Letters, Vol. 14, No. 12, December, 1993, which compares several similar methods of forming oxynitride gate dielectrics.
While such methods are helpful in reducing boron penetration into the channel, the desired gate oxide thickness continues to decrease. The effectiveness of earlier techniques may diminish with decreasing gate oxide thickness. Accordingly, there is a need for improved techniques for reducing dopant penetration (especially boron) into the gate oxide and into the channel region.